use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity adc_ctrl is
port( din:in std_logic_vector(7 downto 0); clk:in std_logic; rd:out std_logic; cs:out std_logic; int:in std_logic; rdy:in std_logic;
dout:out std_logic_vector(7 downto 0)); end adc_ctrl;
architecture behav of adc_ctrl is TYPE states is (st0,st1,st2);
signal current_state,next_state:states:=st0; begin
shixujincheng:process(clk) begin
if(clk'event and clk='1') then if(rdy='0')then
current_state<=next_state; end if; end if;
end process shixujincheng;
zuhejincheng:process(current_state,din,int) begin
case current_state is when st0=> cs<='1';rd<='1'; next_state<=st1; when st1=> cs<='0';rd<='1'; next_state<=st2; when st2=> cs<='0';rd<='0'; if(int='0')then dout<=din;end if; next_state<=st0; when others=> next_state<=st0; end case;
end process zuhejincheng; end behav; 五、实验结果
在电脑上进行仿真：
下载到板子上，通过示波器观察得：
从图中可以看见，当二进制数字信息为“1”时，码元波形变化一次，当二进制为“0”时，波形不发生变化，直到遇见“1”波形再次改变。
该图第一个波形为调制波形，第二个波形为解调后输出的波形，可以发现解调电路能很好的还原调制信号，并有一定时间的延迟。
