中断：
所有可屏蔽中断在单片机复位后都具有相同的优先级，其值为1。若相同优先级的中断同时到来，则具有较高中断向量地址的中断请求获得高优先级。
时钟产生器CRG：
SYNR：同步寄存器 VCOFRQ[1:0]
SYNDIV[5:0]
REFDV：参考分配寄存器 REFFRQ[1:0]
REFDIV[5:0]
POSTDIV：后分配寄存器
如果POSTDIV=0x00，那么fPPL=fVCO CRGFLG：标志寄存器 RTIF：
Real Time Interrupt Flag—RTIF is set to 1 at the end of the RTI period. This flag can only be cleared by writing a 1. Writing a 0 has no effect. If enabled (RTIE=1), RTIF causes an interrupt request. 0 RTI time-out has not yet occurred. 1 RTI time-out has occurred. CRGINT：中断使能寄存器 RTIE：
Real Time Interrupt Enable Bit
0 Interrupt requests from RTI are disabled. 1 Interrupt will be requested whenever RTIF is set. CLKSEL：时钟选择寄存器 PLLSEL
PLL Select Bit Write: Anytime.
Writing a one when LOCK=0 has no effect. This prevents the selection of an unstable PLLCLK as SYSCLK.
PLLSEL bit is cleared when the MCU enters Self Clock Mode, Stop Mode or Wait Mode with PLLWAI bit set.
It is recommended to read back the PLLSEL bit to make sure PLLCLK has really been selected as SYSCLK, as LOCK status bit could theoretically change at the very moment writing the PLLSEL bit.
0 System clocks are derived from OSCCLK (fBUS = fOSC / 2). 1 System clocks are derived from PLLCLK (fBUS = fPLL / 2).
